AArch64 MP+dmb.sy+ctrl-addr-[ws-rf]-addr-pos
"DMB.SYdWW Rfe DpCtrldR DpAddrdW WsLeave RfBack DpAddrdR PosRR Fre"
Cycle=Rfe DpCtrldR DpAddrdW WsLeave RfBack DpAddrdR PosRR Fre DMB.SYdWW
Relax=
Safe=Rfe Fre PosRR DMB.SYdWW DpAddrdW DpAddrdR DpCtrldR [WsLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpCtrldR DpAddrdW WsLeave RfBack DpAddrdR PosRR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X6=a; 1:X10=x;
2:X1=a;
}
P0 | P1 | P2 ;
MOV W0,#1 | LDR W0,[X1] | MOV W0,#2 ;
STR W0,[X1] | CBNZ W0,LC00 | STR W0,[X1] ;
DMB SY | LC00: | ;
MOV W2,#1 | LDR W2,[X3] | ;
STR W2,[X3] | EOR W4,W2,W2 | ;
| MOV W5,#1 | ;
| STR W5,[X6,W4,SXTW] | ;
| LDR W7,[X6] | ;
| EOR W8,W7,W7 | ;
| LDR W9,[X10,W8,SXTW] | ;
| LDR W11,[X10] | ;
Observed
y=1; x=1; a=2; 1:X9=1; 1:X7=1; 1:X11=0; 1:X0=1;
and y=1; x=1; a=2; 1:X9=1; 1:X7=2; 1:X11=0; 1:X0=0;